Laboratory 4 - Theory

Bitwise operation

AND

Syntax:

and <regd>, <regs>; <regd> ← <regd> AND <regs>
and <reg>, <mem>; <reg> ← <reg> AND <mem>
and <mem>, <reg>; <mem> ← <mem> AND <reg>
and <reg>, <con>; <reg> ← <reg> AND <con>
and <mem>, <con>; <mem> ← <mem> AND <con>

Semantics:

  • Executes the logical operation AND on the operands and stores the result in the first operand.

Example:

and EAX, 0Fh; EAX ← EAX AND 0Fh, all bits of EAX except the last 4 bits are forced to 0

OR

Syntax:

or <regd>, <regs>; <regd> ← <regd> OR <regs>
or <reg>, <mem>; <reg> ← <reg> OR <mem>
or <mem>, <reg>; <mem> ← <mem> OR <reg>
or <reg>, <con>; <reg> ← <reg> OR <con>
or <mem>, <con>; <mem> ← <mem> OR <con>

Semantics:

  • Executes the logical operation OR on the operands and stores the result in the first operand.

Example:

or EAX, 0Fh; EAX ← EAX OR 0Fh, the last 4 bits of EAX are forced to 1, all other bits remain unchanged

XOR

Syntax:

xor <regd>, <regs>; <regd> ← <regd> XOR <regs>
xor <reg>, <mem>; <reg> ← <reg> XOR <mem>
xor <mem>, <reg>; <mem> ← <mem> XOR <reg>
xor <reg>, <con>; <reg> ← <reg> XOR <con>
xor <mem>, <con>; <mem> ← <mem> XOR <con>

Semantics:

  • Executes the logical operation XOR on the operands and stores the result in the first operand.

Example:

xor EDX, EDX; forces the content of EDX to 0

TEST

Syntax:

test <regd>, <regs>; <regd> AND <regs>
test <reg>, <mem>; <reg> AND <mem>
test <mem>, <reg>; <mem> AND <reg>
test <reg>, <con>; <reg> AND <con>
test <mem>, <con>; <mem> AND <con>

Semantics:

  • Executes the logical operation AND on the operands, without storing the result in the first operand.

Example:

TEST AL, 01h; we can test whether a number is odd or even 

NOT

Syntax:

not <reg> 
not <mem>

Semantics:

  • Executes the logical operation NOT on the operand (inverts every bit).

Example:

not BYTE PTR [var] ; every bit of [var] is inverted

SHL

Syntax:

shl <reg>, <con8> 
shl <mem>, <con8> 
shl <reg>, CL 
shl <mem>, CL 

Semantics:

  • The bits stored in destination are shifted number positions (modulo 32) to the left. The rightmost bits are filled with 0. The last disappearing bit is kept in CF.

Example:

mov al, 00110011b
mov cl, 2
shl al, cl ; → al = 11001100b, CF = 0

SHR

Syntax:

shr <reg>, <con8> 
shr <mem>, <con8> 
shr <reg>, CL 
shr <mem>, CL 

Semantics:

  • The bits stored in destination are shifted number positions (modulo 32) to the right. The leftmost bits are filled with 0. The last disappearing bit is kept in CF.

Example:

mov al, 01011110b
mov cl, 2
shr al, cl ; → al = 00010111b, CF = 1

SAL

Syntax:

sal <reg>, <con8> 
sal <mem>, <con8> 
sal <reg>, CL 
sal <mem>, CL 

Semantics:

  • The bits stored in destination are shifted number positions (modulo 32) to the left. The rightmost bits are filled with 0. The last disappearing bit is kept in CF.
  • SAL is identical to SHL.

Example:

mov al, 00110011b
mov cl, 2
sal al, cl ; → al = 11001100b, CF = 0

SAR

Syntax:

sar <reg>, <con8> 
sar <mem>, <con8> 
sar <reg>, CL 
sar <mem>, CL 

Semantics:

  • The bits stored in destination are shifted number positions (modulo 32) to the right. The leftmost bits are filled with the sign bit (the leftmost bit before shifting). The last disappearing bit is kept in CF.

Example:

mov al, 11011110b
mov cl, 2
sar al, cl ; → al = 11110111b, CF = 1

ROL

Syntax:

rol <reg>, <con8> 
rol <mem>, <con8> 
rol <reg>, CL 
rol <mem>, CL 

Semantics:

  • The bits stored in destination are rotated number positions (modulo 32) to the left. A bit that goes out on the left side will be automatically added to the right. The last rotated bit is kept in CF.

Example:

mov al, 00110011b
mov cl, 2
rol al, cl ; → al = 11001100b, CF = 0

ROR

Syntax:

ror <reg>, <con8> 
ror <mem>, <con8> 
ror <reg>, CL 
ror <mem>, CL 

Semantics:

  • The bits stored in destination are rotated number positions (modulor 32) to the right. A bit that goes out on the right side will be automatically added to the left. The last rotated bit is kept in CF.

Example:

mov al, 00111110b
mov cl, 2
ror al, cl ; → al = 10001111b, CF = 1

RCL

Syntax:

rcl <reg>, <con8> 
rcl <mem>, <con8> 
rcl <reg>, CL 
rcl <mem>, CL 

Semantics:

  • The bits stored in destination are rotated number positions to the left. A bit that goes out on the left side will be kept in CF. The previous value of CF will be automatically added on the right hand side of destination.

Example:

stc ; CF = 1 (set carry)
mov al, 00110011b
mov cl, 2
rcl al, cl ; → al = 11001110b, CF = 0

RCR

Syntax:

rcr <reg>, <con8> 
rcr <mem>, <con8> 
rcr <reg>, CL 
rcr <mem>, CL 

Semantics:

  • The bits stored in destination are rotated number positions (modulo 32) to the right. A bit that goes out on the right side will be kept in CF. The previous value of CF will be automatically added on the left hand side of destination.

Example:

stc ; CF = 1 (set carry)
mov al, 00110011b
mov cl, 2
rcr al, cl ; → al = 11001100b, CF = 1